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From: stevev@tekchips.UUCP
Newsgroups: net.arch
Subject: Re: VAX polyd instruction (and the SOAR machine)
Message-ID: <119@tekchips.UUCP>
Date: Wed, 12-Mar-86 13:06:28 EST
Article-I.D.: tekchips.119
Posted: Wed Mar 12 13:06:28 1986
Date-Received: Mon, 17-Mar-86 03:26:09 EST
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Organization: Tektronix, Beaverton OR
Lines: 22

> Quite the contrary.  The evaluation of these primitives in hardware is not
> necessarily a bad idea.  As long as it's done in a seperate functional
> unit (and the archecture is pipelined) it is not a bad idea at all.

One thing that has puzzled me about RISC machines is that its proponents
argue that only a very basic machine should be on the main processor chip,
with everything else done in separate functional units.  Sounds fine so far.
Then out of Berkeley comes the SOAR (Smalltalk on a RISC) machine, into
which there is hard-wired support for a very specific language--Smalltalk.
From what I hear from RISC proponents, the `proper' way to have done
this would have been to use a vanilla RISC machine and then to put the
Smalltalk support on a separate chip.

If a Smalltalk-specific RISC machine is a good idea, why not a LISP-specific
RISC machine, a Prolog-specific RISC machine, and a Pascal-specific RISC
machine?  I thought that language-specific architectures were one of the
things that RISC-types say are a bad idea.

		Steve Vegdahl
		Computer Research Lab.
		Tektronix, Inc.
		Beaverton, Oregon