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From: kludge@gitpyr.UUCP (Scott Dorsey)
Newsgroups: net.arch
Subject: Re: ORed indexes
Message-ID: <1706@gitpyr.UUCP>
Date: Wed, 23-Apr-86 18:26:27 EST
Article-I.D.: gitpyr.1706
Posted: Wed Apr 23 18:26:27 1986
Date-Received: Thu, 24-Apr-86 07:38:58 EST
References: <5100066@ccvaxa>
Reply-To: kludge@gitpyr.UUCP (Scott Dorsey)
Organization: Georgia College Of Universal Knowledge
Lines: 26

In article <5100066@ccvaxa> aglew@ccvaxa.UUCP writes:
>
>How would you react to an instruction set that had no indexed addressing
>mode, but did have a mode where a register was ORed into the address?

  Cute.  I like it.  From the looks of it, this would make record types
easy to implement.  It sounds familiar.. I have seen it on one of the newer
32-bit processors in addition to indexed addressing.  It wouldn't replace
indexing too well except maybe on a machine with a slow add.  Newer boxes
often have an adder seperate from the ALU to handle indexing which takes so
little time to do the calculation that such a scheme really wouldn't make
all that much sense as an indexed replacement.  This is not to say that
I wouldn't like it; how about two registers, one added, then the other or'ed.


-- 
-------
Disclaimer: Everything I say is probably a trademark of someone.  But
            don't worry, I probably don't know what I'm talking about.

Scott Dorsey       " If value corrupts
kaptain_kludge         then absolute value corrupts absolutely"

ICS Programming Lab (Where old terminals go to die), Rich 110,
Georgia Institute of Technology, Box 36681, Atlanta, Georgia 30332
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