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From: brooks@lll-crg.UUCP
Newsgroups: net.arch
Subject: Re: Intel iPSC-VX  Supercomputer?
Message-ID: <1426@lll-crg.ARpA>
Date: Sat, 3-May-86 14:52:08 EDT
Article-I.D.: lll-crg.1426
Posted: Sat May  3 14:52:08 1986
Date-Received: Tue, 6-May-86 04:11:15 EDT
References: <1502@ecsvax.UUCP>
Reply-To: brooks@lll-crg.UUCP (Eugene D. Brooks III)
Distribution: net
Organization: Lawrence Livermore Labs, CRG Group
Lines: 18

In article <1502@ecsvax.UUCP> hes@ecsvax.UUCP (Henry Schaffer) writes:
><>I have read about the new Vector Extension of the Intel Personal
>Supercomputer.  This adds a vector processor to each of the processing
>nodes.  (The iPSC is a commercial implementation of the "hypercube"
>idea.)  (In Mgmt. Info. Syst. Week, Apr 21, p 8).
The vector processing option replaces half of the boards in your machine,
you pull out every other processor board and plug these vector boards in.
The vector board looks like a chunk of memory to the processor its connected to.
It has a microcode control store area on it and weitek floating point chips
do the work.  The operation of the floating point processor looks like
subroutine calls to the node cpu its hooked to.

The single most worrysome problem is that the communication performance is
not inproved.  The communication performance is already marginal, for short
messages, and the factor of 10 to 100 speed improvement for floating point
will make communication performance only look that much worse.  There are
applications for which it wont matter, but there are also problems for which
it will be critical.