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From: apn%gilbbs@gilbbs.UUCP
Newsgroups: net.arch
Subject: Re: Response to <1363@unc.unc.UUCP> <1712@gitpyr.UUCP>
Message-ID: <206@gilbbs>
Date: Mon, 28-Apr-86 01:04:00 EDT
Article-I.D.: gilbbs.206
Posted: Mon Apr 28 01:04:00 1986
Date-Received: Sun, 11-May-86 15:44:36 EDT
References: <1363@unc>
Lines: 51

In article <1712@gitpyr.UUCP>, kludge@gitpyr.UUCP (Scott Dorsey) writes:
> In article <1363@unc.unc.UUCP> hedlund@unc.UUCP (Kye Hedlund) writes:
> >BUT, a 68010 is about 0.4 mips @ 10MHz, and a 68020 is about 1.5mips @
> >16.67MHz (measured on SUN workstations running C under 4.2 BSD).
> >This gives 0.040 mips/MHz for the 68010 and 0.091 mips/MHz for the 68020
> >and suggests that there is better than 2:1 architectural and implementation
> >advantage for the 68020 independent of the circuit technology.
> 
>    Your point that the mips/Mhz rate is a slightly accurate method of
> measuring architectural efficiency is somewhat valid, but it must be 
> pointed out that there is no good definition of either the MIPS or the
> MHz rate.  Assuming that MIPS measures the average execution speed of
> the average instruction ( and who says what is average? ), and MHz measures
> clock cycle time, all you are actually measuring is the number of clock
> cycles per instruction.  I have a computer that runs at 200 MIPS, and
> executes one instruction per cycle.  However, because it only has one
> instruction, it is not very efficient, although its specs look great.
> In addition, you can use some Intelling, and tinker with your MIPS and MHz
> rates.  By the way, what is a MHz rate?  Do you mean the number of cycles
> per millionth of a second, and if so, do you include wait cycles and 
> feed/refresh cycles?  The ratio of two meaningless numbers produces a
			/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\\\/\/\/\/\/\/\/\
> number which is still pretty meaningless.
  /\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\

	I agree, the numbers are essentially meaningless. Even among members
of the same CPU family, care must be taken to actually compute the real time
to do a given task ( i.e. tight delay loop ) for example a HD64180 executes
most z80 instructions in 25% less time running at the *same* clock speed. A
similiar comparison can be made between Intel's x86 cpu's and NEC Vx0 parts,
but only on certain instructions.

       However, in the 68010/68020 we simply maybe comparing bus sizes and
respective bandwidths.

	The claims I really enjoyed reading were when Apple quoted there
Mac - thing as having a 32 bit cpu. Maybe those of use with 80n87's should
claim to have 80 bit cpu's ?  GIVE ME A BREAK GUYS....


-- 
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    Alex Paul Novickis		(707) 575 8672
    Fulcrum Computers, Inc.	1635 Ditty Ave. Santa Rosa, CA 95401-2636

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"Almost doesn't count...      but it almost does"

DISCLAIMER:  The opinions contained herein may not be of anyone that I know.