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From: kissell%garth@garth.UUCP
Newsgroups: net.arch
Subject: Re: Response to <1363@unc.unc.UUCP> <1712@gitpyr.UUCP>
Message-ID: <315@garth>
Date: Thu, 1-May-86 07:34:00 EDT
Article-I.D.: garth.315
Posted: Thu May  1 07:34:00 1986
Date-Received: Sun, 11-May-86 15:45:04 EDT
References: <1363@unc>
Lines: 32

In article <1363@unc.unc.UUCP> hedlund@unc.UUCP (Kye Hedlund) writes:
>When comparing the perofrmance of microprocessor architectures, it would
>be desirable to separate architectural factors from technological
>factors. For example, if machine A has performance 1.0 and machine B
>has performance 2.0, does B have a "faster architecture?"  The answer of
>course is "it depends."  It depends on many factors including the
>underlying technology used to fabricate the chip.  If B was implemented
>in 1.0um CMOS and runs off a 20MHz clock whereas A was fabricated with 
>4um nMOS and runs at 5MHz then perhaps the architects (and 
>implementors) of A did an excellent job with a slower technology.
>Perhaps A will run circles around B if implemented with similar 
>technology.
>
>This leads us to making a first attempt at factoring out the technology
>speed out of performance estimates of microprocessors by computing
>performance/MHz.  Mips/MHz immediately comes to mind but one could
>also compare Drystones/MHz, Whetstones/Mz, etc.
>
>This measure is clearly far from precise.  Performance ratings are subject
>to interpretation and variation.  MHz is by no means a complete
>measure of the underlying circuit technology.

Indeed, if cycle time is truly a function of circuit technology,
one wonders how Seymour Cray has managed to get such fast cycle times
with technology that he gleefully admits was a generation behind the
state of the art.  Cycle time is as much a function of architecture
as of technology - it's not just how fast your transistors switch,
it's also how few of them you can get away with stringing together in 
each logic stage.

Kevin D. Kissell
Fairchild Advanced Processor Division