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From: sakw@cvaxa.UUCP (Sak Wathanasin)
Newsgroups: net.arch
Subject: Re: smart I cache
Message-ID: <203@cvaxa.UUCP>
Date: Mon, 5-May-86 11:17:44 EDT
Article-I.D.: cvaxa.203
Posted: Mon May  5 11:17:44 1986
Date-Received: Sun, 11-May-86 16:42:38 EDT
References: <372@houligan.UUCP>
Organization: Univ of Sussex, Cognitive Studies, UK
Lines: 17

>    Let me ask it again: does anybody know of cache organizations that do
>    something specific for keeping loop heads/return points around, or otherwise
>    use something that takes significant knowledge of I-behavior, OTHER than
>    the (well-known) linear pre-fetch desirability?

I'm not sure what a "linear pre-fetch desirability" is, and I apologise
if someone has already mentioned the following (we lost a lot of news a couple
of weeks ago). The MU5 system developed at Manchester U had a "jump history
table" that tried to predict branches using an associative memory in a way
much like that used for page tables.  The MU5 system was described in the 25th
anniversary issue of CACM (sorry I can't remember which year, but it was the
Jan issue).
-- 
Sak Wathanasin, U of Sussex, Cognitive Studies, Falmer, Sussex BN1 9QN, UK
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