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From: brooks@lll-crg.ARpA (Eugene D. Brooks III)
Newsgroups: net.arch
Subject: Re: Cray "A" processor
Message-ID: <1448@lll-crg.ARpA>
Date: Sat, 10-May-86 19:59:53 EDT
Article-I.D.: lll-crg.1448
Posted: Sat May 10 19:59:53 1986
Date-Received: Tue, 13-May-86 01:27:58 EDT
References: <310@cernvax.UUCP>
Reply-To: brooks@lll-crg.UUCP (Eugene D. Brooks III)
Organization: Lawrence Livermore Labs, CRG Group
Lines: 13

In article <310@cernvax.UUCP> mnl@cernvax.UUCP (Mark Nelson) writes:
>I was going through old Communications of the ACM looking for interesting
>articles, and I found the January, 1978 issue, which has a special section
>on computer architecture, including an article on the Cray-I. On page 71,
>under the heading "Front-End Computer Interface", it says:
>
>     Cray Reseaaarch software development is currently being done
>     using a Data General Eclipse computer [as a front end].  The
>     Cray Research "A" processor, a 16-bit, 80 MIPS minicomputer
>					    ^^^^^^^
Take a look at the Cray 2, there are 4 back end processors which have
the full Cray 2 instruction set.  The front end cpu is a stripped instruction
set job that probabably evolved from this work.