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From: maddox@renoir.berkeley.edu (William Maddox)
Newsgroups: net.micro.pc
Subject: Re: Suspected "popf" bug in Intel 80286 (long)
Message-ID: <13344@ucbvax.BERKELEY.EDU>
Date: Tue, 22-Apr-86 03:39:17 EST
Article-I.D.: ucbvax.13344
Posted: Tue Apr 22 03:39:17 1986
Date-Received: Wed, 23-Apr-86 22:04:29 EST
References: <179@vcvax1.UUCP>
Sender: usenet@ucbvax.BERKELEY.EDU
Reply-To: maddox@renoir.berkeley.edu.UUCP (William Maddox)
Distribution: net
Organization: University of California, Berkeley
Lines: 36
Keywords: 80286, IBM AT, popf
Summary: It's a documented "feature"

In article <179@vcvax1.UUCP> tom@vcvax1.UUCP (tom) writes:
>
>While experimenting with an asynchronous communication driver
>for VENIX (in protected mode) on the IBM PC/AT, I
>encountered some rather strange behavior that I now
>attribute to a bug in the Intel 80286 processor.  In
>brief, I suspect that the "popf" instruction enables
>interrupts under certain circumstances even though the
>IF flag is 0 before the instruction is executed and set
>to 0 by the "popf" instruction itself. 

This is a known incompatibility between the 80286 and other members of
the 8086 family.  See pages 9-6 and 9-7 of the AT Technical Reference
for details.  I quote: 

	If the system microprocessor executes a POPF instruction in
	either the real or the virtual address mode with CPL <= IOPL,
	then a pending maskable interrupt (the INTR pin active) may be
	improperly recognized after executing the POPF instruction even
	if maskable interrupts were disabled before the POPF instruction
	and the value popped had IF = 0.

IBM suggests the following code sequence as a compatible
replacement:

	JMP	$+3
	IRET
	PUSH	CS
	CALL	$-2

----------------------------------------------------------
Bill Maddox
ucbvax!renoir!maddox

"Lisp programmers know the value of everything but the cost of nothing."
							- Alan Perlis