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From: schaefer@bgsuvax.UUCP (Stephen Schaefer)
Newsgroups: net.lang,net.lang.forth
Subject: Threaded code and (micro)processors
Message-ID: <95@bgsuvax.UUCP>
Date: Tue, 24-Jun-86 20:51:17 EDT
Article-I.D.: bgsuvax.95
Posted: Tue Jun 24 20:51:17 1986
Date-Received: Sat, 28-Jun-86 04:21:06 EDT
Organization: Bowling Green State University,OH
Lines: 13
Xref: watmath net.lang:2510 net.lang.forth:446

Every microprocessor I've ever met has an extremely fast, single
instruction threaded interpreter in hardware.  Unfortunately, the
designs of the systems built around them usually preempt it.  I wrote
a very nice Forth on my TRS-80 whose NEXT assembly code was spelled:

	RET

Of course, I had to turn off all the interupts....
-- 
	Stephen P. Schaefer
	Systems Programmer
	schaefer@bgsu
	...!cbosgd!osu-eddie!bgsuvax!schaefer