Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 (Tek) 9/28/84 based on 9/17/84; site shark.UUCP Path: utzoo!watmath!clyde!burl!ulysses!bellcore!decvax!tektronix!orca!shark!kellym From: kellym@shark.UUCP (Kelly McArthur) Newsgroups: net.micro.amiga Subject: Re: Memory/clock expansion for the Amiga (7/9 - mem.sch) Message-ID: <1701@shark.UUCP> Date: Fri, 13-Jun-86 13:23:27 EDT Article-I.D.: shark.1701 Posted: Fri Jun 13 13:23:27 1986 Date-Received: Tue, 17-Jun-86 09:20:15 EDT References: <1021@umd5.UUCP> Reply-To: kellym@shark.UUCP (Kelly McArthur) Organization: Tektronix, Wilsonville OR Lines: 38 Keywords: Nonconformance to Specifications... In article <1021@umd5.UUCP> louie@trantor.umd.edu (Louis Mamakos) writes: > > > > 2/4 74125 [D4] > 2 |\ 3 5 |\ 6 > HOLD* ----| >----[66] DTACK* ADR*---+----| >------[18] XRDY > |/O | |/O > 1| | | 4 > | +------+ > +--- ADR* To quote from document "Designing Hardware for the Amiga Expansion Architecture": 2.2.1 Read or Write Cycle with Amiga as Master Since the Amiga bus master is a 68000, the bus cycle is a 68000 cycle. However, the responding slave does not pull DTACK*. Our internal circuitry will pull DTACK* unless the slave pulls XRDY low. Elsewhere, in the document "INTERFACING TO THE 68K CONNECTOR ON THE AMIGA", it states: 2.2 Bus Timing ...Two control inputs, VPA* and DTACK* are driven by logic on the Amiga and should not be driven by your circuitry. Since in the above schematic, DTACK* is shown as being driven by a '125 under some condition it appears likely that this could result in a tri-state contention over DTACK*. This is not good. A few changes to the XRDY* logic would eliminate the need for that driver all together. Kelly McArthur ...tektronix!shark!kellym