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From: aaron@uwmacc.UUCP (Aaron Avery)
Newsgroups: net.micro.amiga
Subject: Re: C Philosophy
Message-ID: <25@uwmacc.UUCP>
Date: Wed, 25-Jun-86 07:21:23 EDT
Article-I.D.: uwmacc.25
Posted: Wed Jun 25 07:21:23 1986
Date-Received: Sat, 28-Jun-86 05:43:39 EDT
References: <8606210754.AA01488@pavepaws> <1146@watdragon.UUCP>
Reply-To: aaron@uwmacc.UUCP (Aaron Avery)
Distribution: net
Organization: National Magnetic Resonance Facility at Madison
Lines: 25
Keywords: 68000, 68010, 68020

In article <1146@watdragon.UUCP> jsgray@watdragon.UUCP (Jan Gray) writes:
>Wrong.  Perhaps the *addressing* takes the same time; however the operations
>don't.  The 68000 has internal 16 bit ALUs;
>	ADD.W	D0,D1	takes 4 cycles
>	ADD.L	D0,D1	takes 8 cycles.
>
>C code which assumes 32 bit ints will run significantly slower on a 68000.
>The 68020 is another story!
>

So is the 68010, by the way. The 8 cycles for the ADD.L D0,D1 above
is due to a 2 cycle penalty for data register direct mode on a long
incurred by the 68000. The 68010 takes 6 cycles for the same operation
and similar ones for which the 68000 takes 8. This could account for
a greater increase due to putting a 68010 in your Amiga than just
the multiply and divide operations. I'd bet side-by-side comparisons of
the 68000 and 68010 in the Amiga would be greatly affected by whether
you were using Lattice with 32 bit ints, or Aztec with 16, but I guess
this would only be if you used a lot of register vars. I was previously 
unaware of any internal penalty for 32 bit operations on the 68000, so I 
thank you for this discussion, as it has been enlightening. 

Aaron Avery ({seismo,topaz,allegra,caip,ihnp4}!uwvax!uwmacc!aaron)
            (aaron%maccunix@rsch.wisc.edu)
            (aaron@unix.macc.wisc.edu)