Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site watdragon.UUCP Path: utzoo!watmath!watnot!watdragon!jsgray From: jsgray@watdragon.UUCP (Jan Gray) Newsgroups: net.micro.atari16 Subject: Re: I *need* memory! Message-ID: <1160@watdragon.UUCP> Date: Sat, 28-Jun-86 12:32:40 EDT Article-I.D.: watdrago.1160 Posted: Sat Jun 28 12:32:40 1986 Date-Received: Sun, 29-Jun-86 07:03:30 EDT References: <8606131855.AA04757@ucbvax.Berkeley.EDU> <126@cci632.UUCP> Reply-To: jsgray@watdragon.UUCP (Jan Gray) Organization: U of Waterloo, Ontario Lines: 63 Summary: In article <126@cci632.UUCP> rb@ccird1.UUCP (Rex Ballard) writes: >In article <8606131855.AA04757@ucbvax.Berkeley.EDU> Mike_Wilson@CARLETON.BITNET (Mike Wilson) writes: >>Hi, >> I'm currently working on a project to port a new version of Smalltalk >>(examplar-based, multiple inheritance, multiple PROCESSOR, for those who... What is examplar-based? Good luck! And port it from where? >>... so unless we can >>expand memory to at least 2Meg, we can't use them. "Jan, how come ``Object hash'' never returns a number larger than 255?" "Well, it's a long story...you see, back in 1986 my ST only had 1 Mbyte of RAM..." >According to Abacus literature, the ST series is capable of supporting >4 megabytes, using 1 megabit chips. Caveat here, these must be 1meg by X >not 256x4 or some similar arrangement. There are 20 address lines plus >two RAS and two CAS lines. The MMU doesn't know how to handle 4 banks >of 256x16, but it does appearantly know how to handle 1megx16. A 1 Mbyte DRAM uses 10 address lines, multiplexing the 10 row and 10 column addresses at different times. The multiplexing and other chip timing is controlled by 1 RAS (row address strobe) and 1 CAS (column address strobe) line. A 1 Mbyte DRAM requires 18 pins (cf. 16 pins for 256K DRAMs). The Atari ST MMU has 2 sets of { RAS, CAS-low-byte CAS-high-byte }, so it can directly support 2 banks of RAM, each of which is 16 bits wide. >There is no question that, using 1meg by X chips, you can get at least >2 meg stuffed in there. You could simplify things by getting SIP hybrids. Since 1 Mbyte DRAMs require 18 pins, you will have to bend up between two and four pins on each DRAM and route the wires yourself. Minor PCB surgery (cutting a few traces) will also be required. SIPS would be *more* work! Current 1 Mbyte DRAM price: $75US each from Microprocessors Unlimited. Therefore 2 Mbytes costs $1200, 4 MBytes cost $2400. You'd be wise to wait a few months, it'll probably be $30 each by 4Q86/1Q87. >If you are willing to rebuild the ram banks completely (modest price, some >labor), you can safely get 2 meg for sure. Getting 4 meg depends on >current requirements of the rams, access times, and general loading/timing >requirements of the 1 meg chips. In general, 1 Mbyte DRAMS are faster (100 ns access times), and have roughly the same current requirements of 256K DRAMs. Should be no problem expanding to 4 Mbytes (except for piggy backing hassles). >ATARI: Have you started putting the holes for the SIP rams onto the >board yet? I realize that actually putting SIPs into the holes would >be too expensive, but it would make atari ram expansion < $70/megX16, and >MUCH easier. Atari will make >200000 ST systems this year. They won't add $1 of cost (in terms of PCB space) to each one to make a few hundred hobbyists happy. "You just watch yourself. We're wanted men. I have the death sentence on 12 systems!" Jan Gray jsgray@watdragon University of Waterloo 519-885-1211 x3870