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From: kds@mipos3.UUCP
Newsgroups: net.arch,net.micro.att
Subject: Re: AT&T MIPS claim
Message-ID: <107@mipos3.UUCP>
Date: Wed, 11-Jun-86 17:16:09 EDT
Article-I.D.: mipos3.107
Posted: Wed Jun 11 17:16:09 1986
Date-Received: Sun, 15-Jun-86 07:18:04 EDT
References: <577@scirtp.UUCP> <124@bakerst.UUCP> <583@scirtp.UUCP> <654@ihdev.UUCP> <585@scirtp.UUCP>
Reply-To: kds@mipos3.UUCP (Ken Shoemaker ~)
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Organization: Intel, Santa Clara, CA
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Xref: watmath net.arch:3422 net.micro.att:1281

Of course, with DEC emphasizing Unibus disks (e.g., RA81s) plugged into
HSC50s and HSC70s, perhaps the I/O bandwidth issue is moot...I can't
believe that the transfer rates over the Unibus is any faster than
any of the more modern microprocessor busses.  I mean, last time I looked
it was an open-collector, asynchronous bus (it did, after all, predate
tri-state logic!)