Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!mnetor!seismo!think!caip!im4u!oakhill!bryant
From: bryant@oakhill.UUCP (Bryant Wilder)
Newsgroups: net.arch
Subject: Outside Influences on Chip Design
Message-ID: <737@oakhill.UUCP>
Date: Sun, 27-Jul-86 00:40:54 EDT
Article-I.D.: oakhill.737
Posted: Sun Jul 27 00:40:54 1986
Date-Received: Sun, 27-Jul-86 06:22:05 EDT
Organization: Motorola Inc. Austin, Tx
Lines: 87
Keywords: customer influence



here are some comments on the postings i've seen lately in net.arch
on outside influences on chip design, specifically on the posting
by rex ballard, 260@cci632.UUCP.
>according to the folklore:
>Motorola, in designing both the 6809 and 68000, surveyed many of its
>own customers AND non-customers before proceeding with designs for their
>"next generation" chips.

i'm going to write about the outside influences on the definitions 
of the MC6809, the MC68000, and the DSP56000 chip designs.

i was the project leader on the 6809 so i know exactly what happened on
that chip design.  terry ritter, chief architect, spent a lot of time
on the road asking customers what they liked and didn't like about the
6800 and other chips on the market.  terry like all architects had a
lot of ideas that he was pushing (sometimes slugging) for the 6809.
in general he wanted the 6809 to be a machine that made sense to a   
programmer.  there was an incredible amount of discussion both internally
and with customers about whether to include the DPR, direct page register.
the DPR is in the 6809 and i hope the customers like it.  customers are
directly responsible for the FIRQ, fast interrupt.  i have heard from 
many customers that they love it.  terry pushed it, but customer input
is responsible for its inclusion.  i don't know where terry came up 
with the idea-customer, himself, or the 68000 team-but one day he wanted
to do an instruction called PEA, push effective address.  my reaction
like any circuit design guy in the middle of a project was it is too late
now to change the flow chart and logic.  the instruction looked good
from a customer point of view so i looked at how to do it for a few days.
i told terry that PEA was not possible but load effective address, LEA,
could be implemented.  he went off for a few days to do something (think
or talk to customers or what) and came back beaming that LEA was even
better.  that's how that instruction happened.  for those of you who
may wonder why the 6809 has only a 64K addressing space, that is because
terry said in meeting after meeting that everyone he talked to thought
memory was going to remain expensive and 64K was about all anyone
was willing to afford for an 8 bit processor.  i guess architects and
customers cannot anticipate everything. :-)  in summary the 6809 was
an architects dream bounced off internal and external customers and
we did change the design using customer input.

i think i know a good deal about how the 68000 architecture was done,
and i talked to tom gunther today, 7/26/86, about it.  in 1976 tom kept
talking to me about a project he wanted to do called MACS, Motorola
Advanced Computer System, which would be at least 10 times the performance
of the 6800.  at some point he convinced colin crook that it should be
done and in january, 1977, tom moved out of F building to an isolated
V building to work in isolation.  i visited him occassionally and it
looked like he was doing a lot of reading. tom told me that colin did
whatever customer contact was made.  at some point skip stritter and
nick tredenick (try copying this guy's signature sometime) joined tom's	
group, and as tom puts it, "we played architecture class everyday."
tom's input to me was, "we were young and naive" and we just defined
the 68000 the way we wanted.  the 68000 was a pretty secret project
and not many customers were contacted.  from what i know about the
68000 design-ins and the 68020 design-ins, it looks like tom and  
crew did pretty well!!

i have been the operations manager for the Motorola DSP business
unit since its start so i know how the DSP56000 architecture happened.
we went through several large and time consuming iterations of
architectural specifications and we talked to many customers.
we wanted to design a dsp chip that has lots of speed, lots of
parallelism, an instruction set that dsp guys can use, lots of 
on chip peripherals to interface to chips that dsp/fast controller
guys use, and we wanted to make pipelining invisible so the software
guys wouldn't break their heads programming the chip.  we also 
wanted a design that could support garden variety high level
languages.  when we started the design, risc was not so in vogue.
if one looks at the chip, one will see that it is a "kinda risc
machine" with lots of parallelism ( three execution units operating  
simultaneously) with lots of on chip peripherals. 
we made many, many changes to the design based on customer inputs.
since we went public last march, the customer response to the chip
has been very enthusiastic.  several motorola salespeople have told me
no chip that motorola has announced has ever gotten this
much customer interest--not even the 68000 or 68020.  in summary
the DSP56000 was designed with a great deal of customer/outside
input.  if any of you are familiar with the DSP56000 and you want
to see some improvements made to it, we want to hear from you!   

bryant wilder  {seismo,ihnp4,gatech,harvard}!ut-sally!oakhill!bryant
(512) 440-2033    or    sun!oakhill!bryant