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From: gibson@unc.UUCP (Bill Gibson)
Newsgroups: net.micro.amiga
Subject: Memory board timings
Message-ID: <25@unc.unc.UUCP>
Date: Thu, 17-Jul-86 11:42:22 EDT
Article-I.D.: unc.25
Posted: Thu Jul 17 11:42:22 1986
Date-Received: Sat, 19-Jul-86 01:55:05 EDT
Distribution: net
Organization: CS Dept, U. of N. Carolina, Chapel Hill
Lines: 32

>In article <737@Navajo.ARPA> rokicki@Navajo.UUCP writes:
	(CardCo board:)
>>
>>	512K machine, 1.1		988 dhrystones
>>	1536K machine, 1.1		674 dhrystones
>>		Loss			 31.8%
>>	512K machine, 1.2 beta II	983 dhrystones
>>	1536K machine, 1.2 beta II	664 dhrystones
>>		Loss			 32.5%
>>
In article <435@oscvax.UUCP> rico@oscvax.UUCP (Rico Mariani) writes:
	(Comspec board:)
>
>    512K machine, 1.1		975.04 dhrys/sec = 51.28 secs for 50000 cycles
>    2.5M machine, 1.1		967.49 dhrys/sec = 51.68 secs for 50000 cycles
>    Comparison:  99.23% of top speed = 0.77% Loss
>
>    512K machine, 1.2 Beta II	976.56 dhrys/sec = 51.20 secs for 50000 cycles
>    2.5M machine, 1.2 Beta II	963.58 dhrys/sec = 51.89 secs for 50000 cycles
>    Comparison:  98.67% of top speed = 1.33% Loss

Were these tests run with the benchmarks *located* in the extra memory,
or were they just run with the extra memory attached? Of course, I would
assume the memory was being used, but I would like to see this explicitly 
stated.

I don't know how the Amiga's wait states are generated; is timing the same
for all memory, or can one have slow expander memory and fast factory-installed
memory?

Bill Gibson
gibson@unc                   ...[akgua,decvax,philabs]!mcnc!unc!gibson