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From: johnl@ima.UUCP (John R. Levine)
Newsgroups: net.arch
Subject: Re: Where are delayed branches handled?
Message-ID: <187@ima.UUCP>
Date: Fri, 15-Aug-86 11:44:42 EDT
Article-I.D.: ima.187
Posted: Fri Aug 15 11:44:42 1986
Date-Received: Sun, 17-Aug-86 08:19:30 EDT
References: <299@vaxb.calgary.UUCP> <612@mips.UUCP>
Reply-To: johnl@ima.UUCP (John R. Levine)
Organization: Javelin Software Corporation
Lines: 15

In the AIX C compiler for the RT PC, we handled the delayed branches in the
peepholer for the compiler.  I wrote a very vanilla assembler by mutating
(a lot) the Sys III Vax assembler, so it did nothing more fancy than choosing
instruction formats and handling long vs. short jumps.

The peepholer seemed to be the best place because it could make assumptions
about the kind of code emitted by the compiler.  Doing the right thing was
a little tricky because only about half of the RT's instructions change the
condition code, and you had to look back in the instruction stream for one
of those.
-- 
John R. Levine, Javelin Software Corp., Cambridge MA +1 617 494 1400
{ ihnp4 | decvax | cbosgd | harvard | yale }!ima!johnl, Levine@YALE.EDU
The opinions expressed herein are solely those of a 12-year-old hacker
who has broken into my account and not those of any person or organization.