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From: josh@polaris.UUCP (Josh Knight)
Newsgroups: net.arch
Subject: Re: Where are delayed branches handled?
Message-ID: <688@polaris.UUCP>
Date: Thu, 14-Aug-86 18:47:49 EDT
Article-I.D.: polaris.688
Posted: Thu Aug 14 18:47:49 1986
Date-Received: Tue, 19-Aug-86 22:17:50 EDT
References: <299@vaxb.calgary.UUCP> <612@mips.UUCP>
Reply-To: josh@polaris.UUCP (Josh Knight)
Organization: IBM Research, Yorktown Heights, N.Y.
Lines: 19

In article <612@mips.UUCP> mash@mips.UUCP (John Mashey) writes:
>In article <299@vaxb.calgary.UUCP> radford@calgary.UUCP (Radford Neal) writes:
>>On RISC machines with delayed branches, who does the instruction
>>rearrangement that tries to put useful instructions after the branch?
>>Obvious possibilities are the assembler or the compiler. Does anyone
>>know whether the compiler can do a significantly better job than 
>>the assembler? (I'm assuming the compiler generates assembler code.)
>
>1) Ours is in the assembler, and I think most others are, also.  I haven't
>seen one that was in the compiler; maybe others have and would say so.
 
I don't believe the PL.8 compiler for the 801 (or for the ROMP) generates
assembly language.  I.e. any code movement to take advantage of delayed
branches is done by the compiler.
 
-- 

	Josh Knight, IBM T.J. Watson Research
 josh@ibm.com, josh@yktvmh.bitnet,  ...!philabs!polaris!josh