Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!ut-sally!ut-ngp!nader From: nader@ut-ngp.UUCP (Nader Bagherzadeh) Newsgroups: net.arch Subject: Dual Port Memory Message-ID: <3866@ut-ngp.UUCP> Date: Sat, 23-Aug-86 16:56:46 EDT Article-I.D.: ut-ngp.3866 Posted: Sat Aug 23 16:56:46 1986 Date-Received: Sat, 23-Aug-86 21:53:20 EDT Distribution: na Organization: UTexas Computation Center, Austin, Texas Lines: 11 Keywords: memory, bandwidth I need some information on Dual Port Memories (DPM). Is it possible to improve the bandwidth by using DPMs or it is just a technology improvement to hide the arbitration in the memory. That is given a current technology, if the the single port memory has bandwidth BW can I expect to get a better performance that BW/2 at each input of the DPM (assuming fair arbitration). Please postnews or send direct e-mail to nader@ngp University of Texas at Austin Elect. Comp. Eng.