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From: ken@argus.UUCP (Kenneth Ng)
Newsgroups: net.arch
Subject: Re: VERY LARGE main memories
Message-ID: <467@argus.UUCP>
Date: Mon, 8-Sep-86 03:31:13 EDT
Article-I.D.: argus.467
Posted: Mon Sep  8 03:31:13 1986
Date-Received: Mon, 8-Sep-86 20:23:02 EDT
References: <2017@sdcsvax.UUCP> <884@gilbbs.UUCP> <289@petrus.UUCP> <8513@duke.duke.UUCP>
Organization: NJ Inst of Tech., Newark NJ
Lines: 18

In article <8513@duke.duke.UUCP>, srt@duke.UUCP (Stephen R. Tate) writes:
> But
> who's going to have 40 bit bank addresses?)
> Steve Tate			..!{ihnp4,decvax}!duke!srt

Check out the load far pointer instruction on the Intel 386.  It is
a full logical address, 48 bits, a selector and and offset.

-- 
Kenneth Ng: Post office: NJIT - CCCC, Newark New Jersey  07102
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