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From: shep@datacube.UUCP
Newsgroups: net.arch
Subject: Logic Cell Arrays (LCAa)
Message-ID: <3200011@datacube>
Date: Sat, 13-Sep-86 10:32:00 EDT
Article-I.D.: datacube.3200011
Posted: Sat Sep 13 10:32:00 1986
Date-Received: Sun, 14-Sep-86 19:58:06 EDT
Lines: 21
Nf-ID: #N:datacube:3200011:000:1199
Nf-From: datacube.UUCP!shep    Sep 13 10:32:00 1986


We have been using Xilinx Logic Cell Arrays (LCAs) in our products for
a few months now. LCA technology is very desirable because of its fast
turnaround and reasonable density. Because the LCAs are ram based, you
can just *download* different configurations and you've changed your design.
Conceptually, the gate/functional complexity is somewhere between the
highest end PAL devices and your vanilla digital gate-array. The vendor
sells a design tool called "Xact" which runs on the IBM-PC <projectile
vomiting here> and serves as an "ok" tool to turn the designer's graphic
intentions into a bitstream format suitable for loading into the chip(s).

Are any other usenet hardware-types using or thinking of using LCA technology?
Are there other LCA users who would *LOVE* to see the Xact tool running
on a Sun workstation? We've used LCAs for glue collection, address generation,
and even see them as candidates for reconfigurable systolic arrays in vector
pipelines; what are other people doing with these neat widgets?

	- waiting for my .lca file to load...

Shep Siegel                    UUCP: [ihnp4 | mirror]!datacube!shep
Datacube Inc.; 4 Dearborn Rd.; Peabody, Ma. 01960;     617 535 6644