Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!caip!clyde!cbatt!cbosgd!ucbvax!CORY.BERKELEY.EDU!dillon From: dillon@CORY.BERKELEY.EDU (Matt Dillon) Newsgroups: net.micro.amiga Subject: Re: Re: 68000 Memory Managment Message-ID: <8609090131.AA23747@cory.Berkeley.EDU> Date: Mon, 8-Sep-86 21:31:57 EDT Article-I.D.: cory.8609090131.AA23747 Posted: Mon Sep 8 21:31:57 1986 Date-Received: Tue, 9-Sep-86 08:43:47 EDT Sender: daemon@ucbvax.BERKELEY.EDU Organization: University of California at Berkeley Lines: 17 >I hate to tell you folks, but Andy Bechtolsheim here at Sun has a patent >(applied for and granted) on using the untranslated addresses as the >RAS addresses and doing the MMU address translation before the column >addresses are needed for CAS. Sooner or later, it's going to cost some >competitors a WHOLE lot of money. Wrong. The idea is too universal for any lawsuit that would come about from it to hold up in court... It's like patenting a FOR loop. Additionaly, you can easily get around the patent by passing ALL the address lines through to the MMU, and spec'ing a faster time input->output for the LSB address lines. There is no mention of dynamic anything in the MMU, and all a dynamic ram board sees are half the address lines immediately available for processing, and the other half not-yet available. Physically, almost every MMU these days pass the LSB N-bits (depending on the page side) anyway, but simply latch them all at once on the output. -Matt