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From: wen-king@cit-vlsi.Caltech.Edu (Wen-King Su)
Newsgroups: net.micro.atari16,net.micro.amiga,net.micro.68k
Subject: Re: 68000 Memory Managment
Message-ID: <937@cit-vax.Caltech.Edu>
Date: Fri, 29-Aug-86 19:45:02 EDT
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Posted: Fri Aug 29 19:45:02 1986
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<<->>

This is only a note on John Bass's article about a way to do virtual
memory with little or no extra cost in time.  There is a catch to
hiding MMU operations between RAS and CAS, though I do not know whether
this applies to the ST.  The high speed CAS only block transfer
operation available in many DRAMs is rendered useless since contiguous
column addresses in a DRAM chip are no longer contiguous in 68K's
address space.  I am not familiar with the graphic hardware of the ST,
but the block transfer modes of the DRAM chips are well suited for high
speed sequential access of blocks of memory that is typical to bitmap
graphic systems.