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From: paf@oblio.UUCP (Paul Fronberg)
Newsgroups: net.arch
Subject: Benchmarks in August IEEE Micro
Message-ID: <322@oblio.UUCP>
Date: Sat, 20-Sep-86 13:29:41 EDT
Article-I.D.: oblio.322
Posted: Sat Sep 20 13:29:41 1986
Date-Received: Sat, 20-Sep-86 21:04:58 EDT
Organization: Counterpoint Computers, San Jose
Lines: 29
Keywords: 386, 286, 68020, 32032, 32100, CACHE

In the August issue of IEEE Micro there is a very interesting article
concerning benchmarking 32-bit microprocessors. The following table is
abstracted from page 57. Numbers are time in seconds. (N=no cache enabled;
C=cache enabled). This table reflects the results for dynamic memory.

	 MHz	  E	  F	 H	  I	  K
80286	(10)	 4.89	13.63	6.59	11.20	19.39
80386	(16)	 3.57	 5.16	3.63	 6.86	 6.20
68000	(8)	13.73	14.61	8.79	12.08	16.59
68020 N	(16)	 8.02	 5.55	3.84	 5.65	 4.78
68020 C (16)	 3.84	 2.47	2.14	 2.75	 3.02
32032	(10)	12.52	13.07	6.21	 8.57	13.07
32100 N (18)	16.81	 8.84	5.05	 8.57	 9.17
32100 C (18)	 6.75	 4.29	2.74	 3.63	 4.45

Benchmarks are EDN 16 benchmarks modified for 32 bits. The benchmarks were
coded in assembly code for each processor.

The following EDN programs were used.

Test E is a character-string search routine.

Test F is a bit test, set, and reset routine.

Test H is a linked-list insertion routine.

Test I is a quicksort routine.

Test K is a bit-matrix transposition routine.