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From: welland@cbmvax.cbm.UUCP (Bob Welland)
Newsgroups: net.micro.68k,net.arch
Subject: Re: 68000 Memory Managment (Bechtolsheim patent)
Message-ID: <772@cbmvax.cbmvax.cbm.UUCP>
Date: Tue, 23-Sep-86 18:01:24 EDT
Article-I.D.: cbmvax.772
Posted: Tue Sep 23 18:01:24 1986
Date-Received: Wed, 24-Sep-86 22:09:51 EDT
References: <508@elmgate.UUCP> <64@mit-prep.ARPA> <15665@ucbvax.BERKELEY.EDU> <utzoo.7123> <539@cubsvax.UUCP> <610@nike.UUCP>
Reply-To: welland@cbmvax.UUCP (Bob Welland)
Organization: Commodore Technology, West Chester, PA
Lines: 18
Xref: mnetor net.micro.68k:1252 net.arch:3120


The Zilog Z8000 MMU (Z8010) does not use the lower 8 address bits in its
translation process. Most of the Zilog documents show the low order address
bits going around the MMU and into "Memory Control". It seems obvious to 
me that any self respecting hardware designer would assert RAS as soon as
possible in there "Memory Controller" (There is no horrible maximum RAS
to CAS time). As I understand it, this is the part of the Sun patent
that gets everyone upset. Is there someone out there with a Zilog 
application note that shows DRAMs explicitly ? I only have 1983 manuals
but I know the Z8000 is from around 1978 ...


				Robert Welland

				Toy Engineer (I am told)


Whatever I should disclaim I do here and now with the disclaim - r.