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From: cameron@foxy.UUCP (cameron spitzer)
Newsgroups: net.arch
Subject: Re: Delayed Loads
Message-ID: <109@foxy.UUCP>
Date: Tue, 30-Sep-86 23:24:18 EDT
Article-I.D.: foxy.109
Posted: Tue Sep 30 23:24:18 1986
Date-Received: Sat, 4-Oct-86 10:26:48 EDT
References: <5100133@ccvaxa> <1115@masscomp.UUCP> <697@mips.UUCP> <7672@tekecs.UUCP>
Organization: Arete Systems,Inc., San Jose, Calif.
Lines: 31

<  eat me if you dare  >
>> For an example of something useful to do with self-modifying code on a
Self modifying code?  Masochism!
It's very dangerous in the 68020 because you don't modify the on-chip cache,
and in a protected machine you the user ain't allowed to flush cache.

>> pipelined machine, see September Dr. Dobbs Journal, pp 114.  Motorola
>> gave the capability to forbid stores in the code area, but few people
>> use it.  (Is anybody out there using the FC lines to write-protect
>> code memory?)
Of course. Everybody who builds a protected (memory-managed?) machine
builds their own MMU or buys Mot's.
Arete's MMU uses FC2 to decide if you have user or kernel permissions.
We also detect if you're trying to write your code or execute your data
(which takes FC1 and FC0);
even kernels ain't got that permission (but they can change the page map).
Our MMU is made of Schottky and very fast CMOS and takes no wait states,
but the same protection is available in Mot's MMU if you're short of
board space.

>>If Mota had been on time with an MMU that utilized the
>> FC lines, they would have been useful, but most designers ignored
>> them.
Huh?  I've never seen a 680x0 design which left FC dangling.
If nothing else, you need them to detect interrupt acknowledge.
Do I hear a put-down here?  Did Mot let you down for a single-chip MMU?
I was delighted their floating point was so nice;
I'd rather roll my own MMU, which is application specific,
than go in the floating point business.
You'd be surprised where FPUs get used;
take a look at printf(3s) or nroff(1) on your machine.