Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!mcvax!jack From: jack@mcvax.uucp (Jack Jansen) Newsgroups: net.arch Subject: Anyone got a list of references on cache memories? Message-ID: <7093@boring.mcvax.UUCP> Date: Wed, 1-Oct-86 18:39:53 EDT Article-I.D.: boring.7093 Posted: Wed Oct 1 18:39:53 1986 Date-Received: Tue, 7-Oct-86 23:05:43 EDT Organization: AMOEBA project, CWI, Amsterdam Lines: 16 Apparently-To: rnews@mcvax A couple of months ago, I asked this same question, and didn't get any answers. So, let's blame it to the holidays, and try again: Does anyone out there have a list of references to articles on cache memories that they wouldn't mind sharing? What interests me most is work done on simple caches for multi-processors (so not the things that don't write through, and need funny memory boards that know their copy of a word is invalid, etc), and how they perform. The performance I'm most interested in is in keeping the bus free, not speeding up the processor. As always, I'll summarize, if requested. -- Jack Jansen, jack@mcvax.UUCP The shell is my oyster.