Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!lll-crg!nike!sri-spam!sri-unix!hplabs!pesnta!valid!markp From: markp@valid.UUCP (Mark P.) Newsgroups: net.arch Subject: Re: Anyone got a list of references on cache memories? Message-ID: <694@valid.UUCP> Date: Wed, 8-Oct-86 18:29:22 EDT Article-I.D.: valid.694 Posted: Wed Oct 8 18:29:22 1986 Date-Received: Fri, 10-Oct-86 00:47:44 EDT References: <7093@boring.mcvax.UUCP> Organization: Valid Logic, San Jose, CA Lines: 31 > > A couple of months ago, I asked this same question, and didn't > get any answers. So, let's blame it to the holidays, and try > again: > > Does anyone out there have a list of references to articles on > cache memories that they wouldn't mind sharing? > What interests me most is work done on simple caches for multi-processors > (so not the things that don't write through, and need funny memory > boards that know their copy of a word is invalid, etc), > and how they perform. The performance I'm most interested in is > in keeping the bus free, not speeding up the processor. > > As always, I'll summarize, if requested. > -- > Jack Jansen, jack@mcvax.UUCP > The shell is my oyster. For those interested-- I have one of Alan J. Smith's cache bibliographies that would make your head swim. It is about 17 solid pages of references. The note attached to my copy indicates that it was submitted to "Computer Architecture News," although I don't know which issue it ended up in. The latest references are for late 1985, so it should only be necessary to check this year's issues. I would suggest looking for this first, and then if you are unsuccessful to contact Alan at UC-Berkeley. I may have his e-mail address around if you e-mail me. In fact, if you really ask nicely and promise to "reimburse" me, I could send off a copy. Mark Papamarcos Valid Logic hplabs!ridge!valid!markp