Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!cbatt!ihnp4!qantel!lll-lcc!lll-crg!nike!ucbcad!ucbvax!hplabs!sdcrdcf!usc-oberon!blarson From: blarson@usc-oberon.UUCP (Bob Larson) Newsgroups: net.micro.68k Subject: Re: The Motorola 68030 Message-ID: <159@usc-oberon.UUCP> Date: Sat, 27-Sep-86 13:53:33 EDT Article-I.D.: usc-ober.159 Posted: Sat Sep 27 13:53:33 1986 Date-Received: Tue, 30-Sep-86 14:22:40 EDT References: <2270@gitpyr.UUCP> <1837@well.UUCP> Reply-To: blarson@usc-oberon.UUCP (Bob Larson) Distribution: net Organization: USC Computing Services, Los Angeles, CA Lines: 18 Keywords: new motorola chips mmu fast In article <1837@well.UUCP> swalton@well.UUCP (Stephen R. Walton) writes: >In article <2270@gitpyr.UUCP> rodney@gitpyr.UUCP (RODNEY RICKS) writes: >>The bus data transfer rate of the 68030 is 40 Mbytes/sec. > >Think about this. That's a memory access time of 25 nanoseconds, more than >4 times as fast as the memory we use in our PC's, Macs, Amigas, and Apples. Think about this. Usinge a 32 bit bus, that's 100 nanoseconds access time. (You don't expect to get full performence from a 68030 on an 8 bit bus do you?) From other articles, the 68030 has a memory access mode designed for either nyble mode rams or a 128 bit bus multiplexed on the way to the CPU. Using these techniques, the 40 Mbytes/sec wouldn't strain 150 ns DRAMS. -- Bob Larson Arpa: Blarson@Usc-Eclb.Arpa or blarson@usc-oberon.arpa Uucp: (ihnp4,hplabs,tektronix)!sdcrdcf!usc-oberon!blarson