Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!cbatt!ihnp4!qantel!lll-lcc!lll-crg!nike!oliveb!glacier!navajo!rokicki From: rokicki@navajo.STANFORD.EDU (Tomas Rokicki) Newsgroups: net.micro.amiga Subject: Who is stealing my cycles? Message-ID: <858@navajo.STANFORD.EDU> Date: Fri, 26-Sep-86 13:14:45 EDT Article-I.D.: navajo.858 Posted: Fri Sep 26 13:14:45 1986 Date-Received: Tue, 30-Sep-86 04:58:15 EDT Organization: Stanford University Lines: 40 [ / | \ cruisin' on down . . . ] Well, folks, I have some bad news. I wrote a test routine to see just exactly how many CPU cycles I was getting from my Amiga. This routine was essentially nested dbra's: loop(i,j) int i,j { #asm move.w 8(a5),d1 move.w 10(a5),d0 loop: dbra d0,loop dbra d1,loop #endasm } So, I pass it the appropriate parameters to consume 2,000,000,000 cycles, and time it. This was with no other programs running, no workbench loaded, and just a standard CLI open. I even subtracted the overhead. I tried it in chip and in fast memory; I tried it with my external memory disconnected; I tried it with the workbench screen moved all the way down so it wasn't visible. Still, between 8 and 17 percent of the CPU disappeared somewhere. So it's not that much, but I'm interested in what the machine could be possibly doing that eats the CPU. I have an explanation for the 17% figure; when run out of chip memory, the processor gets every other 3.6 MHz RAM slot. Well, running at 7.2 MHz, occasionally it wants the odd slot (a dbra does two fetches but requires ten cycles, so it is guilty of this) so the processor must wait two cycles before it gets the bus. But out of fast memory this shouldn't happen . . . What it comes down to is this; the fastest effective clock speed I have been able to get is 6.6MHz. Not to bitch, but I wouldn't be upset to get more . . . -tom