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From: hr@uicsl.UUCP
Newsgroups: net.micro.amiga
Subject: Re: The Motorola 68030
Message-ID: <151400040@uicsl>
Date: Thu, 2-Oct-86 11:03:00 EDT
Article-I.D.: uicsl.151400040
Posted: Thu Oct  2 11:03:00 1986
Date-Received: Sat, 4-Oct-86 11:46:19 EDT
References: <2270@gitpyr.UUCP>
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Nf-ID: #R:gitpyr.UUCP:2270:uicsl:151400040:000:767
Nf-From: uicsl.UUCP!hr    Oct  2 10:03:00 1986


RE:
> Think about this.  That's a memory access time of 25 nanoseconds, more than
> 4 times as fast as the memory we use in our PC's, Macs, Amigas, and Apples.

>>If the 68030 is anything like the 68020, you probably only need 100ns
>>cycle time memories, since the bus can be four bytes wide. The access time
>>will have to be less, though, to allow for setting up the address.

Would someone who has access to the product announcement check this?:
I thought I read that the chip would be able to handle one of the "funny"
modes available on some DRAMs, nibble, page, or some such. My understanding
is that this would allow "short cycling" on consecutive memory accesses.
How much of a speedup would this give?

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	harold ravlin		{ihnp4,pur-ee}!uiucdcs!uicsl!hr