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From: ranger@ecsvax.UUCP (Rick N. Fincher)
Newsgroups: net.micro.apple
Subject: Re: Re: InCider's comments on the new //GS
Message-ID: <2093@ecsvax.UUCP>
Date: Thu, 2-Oct-86 10:30:27 EDT
Article-I.D.: ecsvax.2093
Posted: Thu Oct  2 10:30:27 1986
Date-Received: Sat, 4-Oct-86 10:05:53 EDT
References: <285@neoucom.UUCP> <812@cbmvax.cbmvax.cbm.UUCP>
Organization: UNC Educational Computing Service
Lines: 65

> > One thing positive that I can say is that the 65816 is a pretty
> > neat CPU.  I'd like to get my hands on a //GS to dhrystone it.
> > From what I've read, the claims are that the 3 MHz65816 can beat an 8
> > MHz 68K chip.  Also WDC promised a 65832 that fits the same socket
> > by 1987.
> > 
> > Bill Mayhew
> 
> Don't count on it.  A 2.8MHz 65C816 can, in many cases, beat a 4.77MHz
> 8088.  But not a 68000 at 8MHz.  While the 65C816 at 2.8MHz does run a 
> slightly faster bus speed than the 68000 at 8MHz, it has several major
> problems with using this speed: (1) The bus is still 8 bits wide, the 
> 68000 bus is 16 bits wide.  The 68000 is going to clobber the '816
> when 16 bit operations are required. (2) The 65C816 still only has one

 True but all of the 65816's instructions are 8 bits long and research
has shown that the vast majority of tasks involve 8 bit to 16 bit quantities.

A 6mhz 65816 would give the 68000 a run for its money.  The 8 bit data bus
is a limitation but the '816 load 32 bits in 4 clock cycles, about the
same as the 68000.

> general purpose register, the 68000 has 16 reasonably general registers, 
> each of which is twice the width of the '816's register.  Register based
> computation is much, much faster than memory based computation; this is

Yes the 68000 will be a big winner in register based computation but
the 68000 machines in the //gs class suffer from the major problem of
a lack of software, the '816 has compatibility with the 6502, so the
machine has 20,000 programs for it the day it hits the street.

> one of the major principles of RISC architectures (not to imply that either
> machine is RISC, neither is).  (3) The 68000 has a much more powerful
> instruction set.  Just the multiply instruction alone is a big win in any
> numeric computations. (4) The '816 is a bit awkward/inefficient to program,
 
The 68000 design team didn't include 32 mult because they found that it was
faster in software, this is stated in "The MC68000 design Philosophy"
printed in Byte in '83 (I think).  The Motorola boys compared their
32 bit software mult to the Z8000 hardware mult and showed how the software
mult was faster,  that is why RISC machines came about (I agree though,
neither of these processors are RISC).  I just think simple, hardwired
processors are the way to go, because we are running up against the speed
limits of current silicon technology.

> especially considering the instruction overloads.  Every instruction can
> operate on either 8 or 16 bit data, based upon a bit set in the status
> register.  This makes switching between byte and word oriented data clumsy.
> (5) An upgrade to a 32 bit processor, in  a pin-compatible package, won't
> gain you very much.  A large part of the advantage of a 32 bit processor
> over a 16 bitter, or a 16 over an 8, is the doubling of the data bus.  A
> pin compatible replacement would take a minimum of 4 times as long to
> run each 32 bit instruction based in memory as the equivalent processor
> with a 32 bit data bus.  Also, WDC promised to have the 65C816 chip ready
> about 4 years ago, and its just now avilable in production quantities, from
> GTE.  So I wouldn't be waiting on the edge of my seat for a 32 bit version.
Sure the 816 took awhile, WDC didn't have Mot's big bucks, but with the
good sales of the 65C02 and the '816 they have some cash to work with
and an accepted product.  

> 

Rick Fincher

Ranger@ecsvax