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From: bsteve@gorgo.UUCP
Newsgroups: net.arch
Subject: Re: Floating point performance & Mr
Message-ID: <30200001@gorgo.UUCP>
Date: Wed, 22-Oct-86 00:39:00 EDT
Article-I.D.: gorgo.30200001
Posted: Wed Oct 22 00:39:00 1986
Date-Received: Thu, 23-Oct-86 23:05:42 EDT
References: <1198@hoptoad.uucp>
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Nf-From: gorgo.UUCP!bsteve    Oct 21 23:39:00 1986


AARRRGGH...

   There is NO implicitly direct relationship between MegaFlops and clock
speed! Good grief people, what about consideration of the number of tics per
MMU cycle and how this is affected by the need for waitstates at higher clock
speeds? Does the architecture support stackable MMU's, and how might this
affect memory cycle time and how do the cycle times differ amoung various
addressing modes? Flops/Hz is just not a valid measurement of anything. This
is particularly true in view of the fact that "Flops" varies wildly from
benchmark to benchmark.

   Steve Blasingame (Oklahoma City)
   bsteve@eris.Berkeley.Edu
   ihnp4!occrsh!gorgo!bsteve


"We burn the tabonga with a might fire and yet it would not die..."
				From: FROM HELL IT CAME