Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!clyde!cbatt!ihnp4!inuxc!pur-ee!uiucdcs!uiucdcsb!robison From: robison@uiucdcsb.cs.uiuc.edu Newsgroups: comp.arch Subject: Re: How does compiled code use the floa Message-ID: <165100001@uiucdcsb> Date: Sun, 7-Dec-86 01:04:00 EST Article-I.D.: uiucdcsb.165100001 Posted: Sun Dec 7 01:04:00 1986 Date-Received: Sun, 7-Dec-86 21:03:19 EST References: <394@houxs.UUCP> Lines: 12 Nf-ID: #R:houxs.UUCP:394:uiucdcsb:165100001:000:481 Nf-From: uiucdcsb.cs.uiuc.edu!robison Dec 7 00:04:00 1986 I've heard of another scheme, but never tried it: Code generation emits a call to a floating point library. If the FP hardware is available, the library routine changes (at run time) the call instruction to the equivalent hardware instruction. This way you pay for the subroutine linkage only on the first call. The disadvantage is that self-modifying code is not allowed on some architectures. Arch D. Robison robison@uiucdcs University of Illinois at Urbana-Champaign