Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rochester!ritcv!cci632!rb From: rb@cci632.UUCP (Rex Ballard) Newsgroups: comp.arch Subject: Re: >32-bit microprocessors in the works, anyone? Message-ID: <672@cci632.UUCP> Date: Mon, 17-Nov-86 18:42:30 EST Article-I.D.: cci632.672 Posted: Mon Nov 17 18:42:30 1986 Date-Received: Tue, 18-Nov-86 21:20:16 EST References: <1030@husc2.UUCP> Reply-To: rb@ccird2.UUCP (Rex B) Distribution: net Organization: CCI, Communications Systems Division, Rochester, NY Lines: 53 Keywords: 36, 40, 48, 64, or more bits internally? Summary: Other alternatives are more cost-effective. In article <1030@husc2.UUCP> chiaraviglio@husc2.UUCP (lucius) writes: >_ > Has anyone heard of anybody working on a microprocessor with an >internal data-width of more than 32 bits? I think we are going to be due for >another internal data-width and address-width upgrade in a few years, as >people move more number-crunching and very large applications onto >microprocessor-based systems. There seem to be different reasons, but in general the trade-offs between a 64 bit machine and other design alternatives seems to go against the wider external data paths. Most mini makers have chosen to hide or expose additional processing power in terms of coprocessors or dedicated front-end peripheral processors. Addition of FPU's, LAN controllers, and even tty "panels" often do more to upgrade the final result than does a wider backplane. While it is possible that someone may come out with wider path processors of special dedicated applications, most will probably work with more efficient archetectures for inter-processor communications. >Also, increasing the external bus width would >(in conjunction with pipelining/instruction-stream-caching) help alleviate the >problem of processors being considerably faster than memory. These problems are legitimate reasons to widen data paths, but they are also legitimate reasons for alternative connectivity, such as loosely coupled systems, transaction processing, and processor networks. >However, I have >not heard of any internal or external data- or address- width increases in the >works. There are a few rumors of variable width internal increases, some as much as 512 bits, but almost nothing happening in terms of external increases. I'm not so near sighted as to think we will never need more than 32 bits, but even with optical storage, more than 4 gigabytes of "demand paged memory" will probably be addressed with those "yukky kludges" like segmentation before they are addressed with a doubling of address bits. There is a good possibility that with new archetectures like the transputer beginning to gain acceptance, we may start looking at networks of 100 processors or more with as little as 2k/processor and seldom more than 1 meg per processor. Some of these processors may be little more than "smart dma" processors, with a little bit of programmability, others may be full blown vaxen on just a few chips. The difficulty will most likely be in trying to determine how to distribute these resources effectively. > -- Lucius Chiaraviglio Rex Ballard.