Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!cmcl2!phri!cooper!gene From: gene@cooper.UUCP (Eugene Kwiecinski ) Newsgroups: comp.sys.m68k Subject: Re: Intel vs Motorola Byte ordering Message-ID: <669@cooper.UUCP> Date: Mon, 24-Nov-86 13:08:13 EST Article-I.D.: cooper.669 Posted: Mon Nov 24 13:08:13 1986 Date-Received: Tue, 25-Nov-86 03:24:53 EST References: <1509@ihlpl.UUCP> Distribution: net Organization: The Cooper Union (NY, NY) Lines: 22 Summary: An answer! In article <1509@ihlpl.UUCP>, swanson@ihlpl.UUCP (Swanson) writes: > Could someone please explain to me the rational behind the > way INTEL stores words in memory? The way Motorola stores > words in memory? Please email. Thank you. To save on a few transistors, of course. (money is money) From a hardware point of view, it's easier to add the LSBs first and work up to the MSBs ( B = Byte, not bit ). Bye, Gene Usenet (UUCP) Address: cucard\ psuvax!cmcl2\ {psuvax1!princeton, ucbvax!ulysses}!allegra>!phri!cooper!gene columbia/ {decwrl!ihnp4, harvard!seismo, decvax}!philabs/ (Whew!)