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From: hansen@mips.UUCP (Craig Hansen)
Newsgroups: comp.sys.m68k
Subject: Re: Intel vs Motorola Byte ordering
Message-ID: <779@mips.UUCP>
Date: Wed, 26-Nov-86 02:00:29 EST
Article-I.D.: mips.779
Posted: Wed Nov 26 02:00:29 1986
Date-Received: Wed, 26-Nov-86 08:16:26 EST
References: <1509@ihlpl.UUCP>
Distribution: net
Lines: 31
Summary: Neither ordering is truly advantageous over the other.

In article <1509@ihlpl.UUCP>, swanson@ihlpl.UUCP (Swanson) writes:
> Could someone please explain to me the rational behind the
> way INTEL stores words in memory?  The way Motorola stores
> words in memory?  Please email.  Thank you.

You will undoubtably get several lame excuses why one ordering is better
than the other. They are both right...and both wrong.  The two conventions
are commonly described as little-endian and big-endian, which is a reference
to the frivolous dispute the Brobdignagians engaged in over which end an egg
should be broken on, in Johnathan Swift's _Gulliver's_Travels_.

At this point, a debate between the two conventions is entirely frivolous.
What's important is that there are two distinct conventions, and that this
can be a barrier to porting programs and databases, and data communications
between machines employing different conventions.  At MIPS, we refer to
these conventions as "byte sex," emphasising the two-ness and
incompatibility between them, but begging the question as to which is male
and which is female.  (The MIPS processor is, in this way, bisexual, and can
be configured to follow either convention.)

What I find inexcusable is the existence of machines that mix up the two
conventions on a single machine.  Motorola-endian is little-endian for bits,
and big-endian for most everything else (including the 68020 bit field
operations).  VAX-endian is mostly little-endian, except for floating-point
values which are, well, little-big-endian.

-- 

Craig Hansen			|	 "Evahthun' tastes
MIPS Computer Systems		|	 bettah when it
...decwrl!mips!hansen		|	 sits on a RISC"