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From: jkg@gitpyr.gatech.EDU (Jim Greenlee)
Newsgroups: comp.sys.m68k
Subject: Re: Byte ordering, and pros/cons
Message-ID: <2758@gitpyr.gatech.EDU>
Date: Wed, 3-Dec-86 03:29:36 EST
Article-I.D.: gitpyr.2758
Posted: Wed Dec  3 03:29:36 1986
Date-Received: Wed, 3-Dec-86 23:33:17 EST
References: <1271@ihwpt.UUCP> <16900001@clio>
Reply-To: jkg@gitpyr.UUCP (Jim Greenlee)
Organization: Georgia Institute of Technology
Lines: 18

In article <16900001@clio> berger@clio.Uiuc.ARPA writes:
>This is surely faster than incrementing the address counter, fetching,
>decrementing, fetching, and incrementing twice.

I'd be surprised if any of the "big-endian" (did I get that right? :-)
microprocessors go to all that trouble. I think it's more likely that
they read the data from memory in the order that it appears, and then
do a byte swap within the CPU (or maybe it's the "little-endians" who 
do all the swapping :-). I honestly don't see what difference it makes -
I mean, after all, both schemes work, don't they?

                                            Jim Greenlee

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