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From: oberman%erd131.DECnet@LLL-ICDC.ARPA ("ERD131::OBERMAN")
Newsgroups: mod.computers.vax
Subject: References to processor specific registers
Message-ID: <8611121023.AA16525@ucbvax.Berkeley.EDU>
Date: Tue, 11-Nov-86 19:08:00 EST
Article-I.D.: ucbvax.8611121023.AA16525
Posted: Tue Nov 11 19:08:00 1986
Date-Received: Wed, 12-Nov-86 21:37:53 EST
Sender: daemon@ucbvax.BERKELEY.EDU
Reply-To: "ERD131::OBERMAN" <oberman%erd131.decnet@lll-icdc.arpa>
Organization: The ARPA Internet
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Approved: info-vax@sri-kl.arpa

I am working on a VMS device driver that makes reference to the hardware
Interval Counter Register. As this register is processor dependent it is
defined as PRx$_ICR, where x is the processor type. (e.g. PR750$_ICR)
I can pull out the definition appropriate to the processor I'm using (a
750), but this will make the driver non-transportable. I'm not fond of that.

I know that VMS accesses these registers. So do some layered products. SPM
and PCA come to mind. How can I write code (MACRO) to access these without
being processor dependent?

				Thanks in advance,
				R. Kevin Oberman
				LLNL
				arpa: oberman@lll-icdc.arpa
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