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From: jkg@gitpyr.gatech.EDU (Jim Greenlee)
Newsgroups: comp.arch,comp.sys.m68k
Subject: 68008 stuff (was Re: byte order: etc...)
Message-ID: <2899@gitpyr.gatech.EDU>
Date: Sun, 18-Jan-87 10:10:12 EST
Article-I.D.: gitpyr.2899
Posted: Sun Jan 18 10:10:12 1987
Date-Received: Tue, 20-Jan-87 05:08:44 EST
References: <760@orcisi.UUCP> <1011@cuuxb.UUCP> <753@vaxb.calgary.UUCP> <980@gould9.UUCP> <755@vaxb.calgary.UUCP>
Reply-To: jkg@gitpyr.UUCP (Jim Greenlee)
Organization: Georgia Institute of Technology
Lines: 24
Xref: mnetor comp.arch:204 comp.sys.m68k:120

In article <755@vaxb.calgary.UUCP> radford@calgary.UUCP (Radford Neal) writes:
>Anyway, I've actually used both 68000 and 68008 processors, and can assure
>you that they are pretty much compatible. According to the documentation,
>they even went so far as to have the 68008 trap word accesses at an odd
>address (I didn't actually try it). Personally, I think this was going 
>too far, especially as (I am given to understand) the 68020 doesn't. (I
>know, I know, the 68008 came earlier...)

My understanding of why this was done was to ensure that the 68008 would
be COMPLETELY software compatible with the 68000, the idea being that at
some future date you might want to *upgrade* from an (old, antiquated) 8
bit architecture to a (new, futuristic) 16 bit uP.  Obviously, you wouldn't 
want to have to rewrite your software to handle even-only addressing, so...

Actually, I think it was probably done that way to save the Motorola people
the trouble of rewriting most of their micro-code. I don't know about the 
68020, never having used it myself.

						Jim Greenlee
-- 
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