Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!cbatt!ihnp4!inuxc!pur-ee!uiucdcs!uiucdcsp!johnson From: johnson@uiucdcsp.UUCP Newsgroups: comp.arch Subject: shared memory multiproc. question Message-ID: <76700001@uiucdcsp> Date: Sat, 31-Jan-87 11:40:00 EST Article-I.D.: uiucdcsp.76700001 Posted: Sat Jan 31 11:40:00 1987 Date-Received: Sun, 1-Feb-87 15:38:18 EST Lines: 15 Nf-ID: #N:uiucdcsp:76700001:000:768 Nf-From: uiucdcsp.cs.uiuc.edu!johnson Jan 31 10:40:00 1987 There are a number of shared memory multiprocessors on the market today that consist of a number of high-end microprocessors on a single bus. Decent performance is obtained by using fancy cache technology. Making a single board computer is pretty trivial now-a-days, and making a multiprocessor system without the caches is not much harder but fairly pointless. How hard is it to make these caches? Are there chips on the market that do most of the work for you? I am mildly interested in building a shared memory multiprocessor to attatch to a Sun or some other workstation for experimental purposes. Is anybody selling boards from which one could build such a system easily and inexpensively? Ralph Johnson ihnp4!uiucdcs!johnson johnson@p.cs.uiuc.edu