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From: andy@batcomputer.UUCP
Newsgroups: comp.arch
Subject: Re: Re: Re: I've Got The Microprocessor Blues
Message-ID: <166@batcomputer.tn.cornell.edu>
Date: Thu, 12-Feb-87 09:20:51 EST
Article-I.D.: batcompu.166
Posted: Thu Feb 12 09:20:51 1987
Date-Received: Sat, 14-Feb-87 13:04:07 EST
References: <1389@cbmvax.cbmvax.cbm.UUCP> <1392@cbmvax.cbmvax.cbm.UUCP>
Reply-To: andy@batcomputer.UUCP (Andy Pfiffer)
Organization: Theory Center, Cornell University, Ithaca NY
Lines: 37

daveh@cbmvax.cbm.UUCP (Dave Haynie) writes:
>If you're interested in modern architectures, look into the INMOS Transputer
>series.  These are 16 and 32 bit processors that employ an number of
>RISC architectural ideas.
...
>I've got no connections to INMOS, other than an appreciation of the 
>Transputer.

Its a simply elegant processor at the instruction set level.

Don't look to a Transputer for gobs of registers, though.  It's only got
an instruction pointer, a workspace pointer (essentially a stack pointer --
local variables are offsets from the workspace pointer), and a stack of
registers that are 3 deep known oddly enough as aReg, bReg, and cReg.

Because they are maintained as a stack, you can't randomly address them.
eg, addition:

	ldc 1
	ldc 2
	add

leaves 3 in the A register.

It wins hands down (so far :^) as a hardware multi-tasker.  It could use
a smaller time-slice, though.

	Andy


ps: It does stash a number of other "processor temporaries" and processor
    registers in on-chip RAM....
-- 
Andy Pfiffer					andy@tcgould.tn.cornell.edu
Cornell Theory Center / Cornell U.		cornell!batcomputer!andy
Home of the first usable T-Series		(607) 255-8686
"...that's the way a Transputer works, right?"  Systems Group