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From: markp@valid.UUCP (Mark P.)
Newsgroups: comp.graphics
Subject: Re: CRT technology?
Message-ID: <928@valid.UUCP>
Date: Wed, 21-Jan-87 18:41:06 EST
Article-I.D.: valid.928
Posted: Wed Jan 21 18:41:06 1987
Date-Received: Sat, 24-Jan-87 00:39:23 EST
References: <2029@batcomputer.tn.cornell.edu> <54@eps2.UUCP> <1522@cit-vax.Caltech.Edu>
Organization: Valid Logic, San Jose, CA
Lines: 48

> >  We figured that if you built a 1280 x
> >1024 x 24 bit frame buffer, you needed LUTs with 7ns access times.
> >...
> >I imagine that we'll see some high-resolution (1600 x 1280, 1280 x 1024)
> >full color (24 bits) systems for electronic prepress in the near future.

Actually, it is now completely cookbook to build a 1280x1024 non-interlaced
display, assuming that you use 64kx4 video RAMs and a really nifty RAMDAC
part from Brooktree (soon to be 2nd-sourced by Fairchild), called the Bt458.
This combination effectively allows you to almost completely eliminate the
ECL portion of your design (except for a clock driver for the Bt458), even
at video rates of 125MHz.

For those not familiar with video RAM technology, imagine a conventional
64kx4 DRAM, organized as 256 rows of 1024 bits each.  There is a special
cycle, called a load or transfer, which transfers an ENTIRE ROW of 1024 bits
into a 25MHz shift register (assuming a 120ns access time part).  This shift
register then outputs 4 bits at a time, for an aggregate single-chip bandwidth
of 100Mbps!  However, to implement a 1280x1024, 125MHz display, you need to
use 5 chips per plane (at any given time) and some unorthodox addressing
techniques, which are left as an exercise for the reader.

The Bt458 then receives up to 25 bits at a time, and multiplexes them at
the higher bit rate (either 4:1 or 5:1), pipelines them, passes through three
256x24 lookup tables with overlay, three video DACs, and out pops RGB video!
The internal RAMs operate at an effective cycle time of 8ns, and are, believe
it or not, implemented entirely in CMOS.

For even higher resolutions, video RAMs may be interleaved (which isn't very
hard at 25MHz) and Brooktree has independent RAMs and video DACs which operate
at 200MHz, for an effective cycle time of 5ns (>1536x1280).  Except for the
nasty problems of PC routing in the output stage, such circuits can easily be
designed by a garage-based logic hacker.

The possibilities generated by a cookbook approach for very high resolution
displays are truly frightening, but unfortunately monitor costs will probably
continue to keep the cost of graphics in the nether regions expensive.

Further details avaiable from your local Brooktree, Mitsubishi, TI, AMD,
NEC, Fujitsu [etc. ad nauseum] distributors.

	Mark Papamarcos
	Valid Logic Systems
	hplabs!{ridge,pesnta}!valid!markp

P.S.  I have no financial interest in Brooktree, or in any of the various
      semiconductor vendors which produce video RAMs, but I do personally
      think that they are neat parts.