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Path: utzoo!watmath!clyde!rutgers!ames!amdahl!drivax!socha
From: socha@drivax.UUCP
Newsgroups: comp.arch,comp.sys.m68k
Subject: Re: byte order: be reasonable - do it my way...
Message-ID: <820@drivax.UUCP>
Date: Thu, 22-Jan-87 16:26:45 EST
Article-I.D.: drivax.820
Posted: Thu Jan 22 16:26:45 1987
Date-Received: Mon, 26-Jan-87 01:48:30 EST
References: <760@orcisi.UUCP> <1011@cuuxb.UUCP> <753@vaxb.calgary.UUCP> <980@gould9.UUCP> <755@vaxb.calgary.UUCP>
Reply-To: socha@drivax.UUCP (Henri J. Socha)
Organization: Digital Research, Monterey
Lines: 23
Summary: 68008 is a 68000 on an 8 bit bus.
Xref: watmath comp.arch:241 comp.sys.m68k:170


in reply to: radford@calgary.UUCP (Radford Neal)
> In article <980@gould9.UUCP>, joel@gould9.UUCP (Joel West) writes:
> > The 68000 is big-endian, as is the 68020.
> > 
> > Recently I saw the suggestion that the 68008 is little-endian,
> > except when fetching opcodes.  Could this be true?
> Anyway, I've actually used both 68000 and 68008 processors, and can assure
> you that they are pretty much compatible. According to the documentation,
                    ^^^^^^^^^^^
>     Radford Neal     The University of Calgary

Actually, the 68008 is internally EXACTLY a 68000 with the exception of an
interface to an 8 bit bus. i.e. the ALU, microcode, registers all no change!
Just whenever the 68000 wants to do a 16 bit read, there are two memory cycles
to get the LSB and MSB at their correct 68000 addresses.

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UUCP:...!amdahl!drivax!socha                                      WAT Iron'75
"Everything should be made as simple as possible but not simpler."  A. Einstein