Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!rutgers!cbmvax!vu-vlsi!elh From: elh@vu-vlsi.UUCP Newsgroups: comp.arch Subject: Re: Using a DMA chip in strange ways Message-ID: <630@vu-vlsi.UUCP> Date: Wed, 18-Feb-87 08:26:08 EST Article-I.D.: vu-vlsi.630 Posted: Wed Feb 18 08:26:08 1987 Date-Received: Fri, 20-Feb-87 06:51:33 EST References: <4343@columbia.UUCP> Organization: Villanova Univ. EE Dept. Lines: 25 Summary: RE: Using DMA chip to copy memory In article <4343@columbia.UUCP>, dupuy@amsterdam.columbia.edu (Alexander Dupuy) writes: > ....would > there be any advantage in having a DMA chip which would simply be used for > memory to memory copies (from user to kernel space, or from one user space to > another)? > I believe this is currently a feature on many commercially available DMA controllers. In particular, while I was working on the architecture/ partitioning of some of the peripheral chips for the ATT WE32XXX family, we decided to include this feature in the the DMA member of that family. This has shown increased performance in memory-to-memory copies in the operating system (as reported in a paper in the 1986 International Conference on Computer Design... I forget the exact reference). This part also has a number of other interesting features including a *separate* byte wide bus which services commercially available byte wide peripherals (disk, lan, etc. controllers), byte to word packing, word buffering and burst mode bus transactions.... The peripherals on the byte wide bus lie in the address space of the DMA peripheral which lies somewhere in the address space of the system (obviously...). Dr. Ed Hepler, Adjunct Prof. Villanova University Staff Engineer, GE Astro Space, Valley Forge (Formally MTS, Bell Labs, Naperville, Ill.)