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From: bcase@amdcad.UUCP
Newsgroups: comp.arch
Subject: Re: register window machine questions
Message-ID: <14986@amdcad.UUCP>
Date: Thu, 26-Feb-87 12:51:49 EST
Article-I.D.: amdcad.14986
Posted: Thu Feb 26 12:51:49 1987
Date-Received: Sat, 28-Feb-87 05:05:47 EST
References: <4376@columbia.UUCP> <7284@boring.mcvax.cwi.nl>
Reply-To: bcase@amdcad.UUCP (Brian Case)
Organization: Advanced Micro Devices, Sunnyvale, California
Lines: 12

In article <7284@boring.mcvax.cwi.nl> jack@boring.UUCP (Jack Jansen) writes:
>
>Something that I would be very interested in is wether there
>is any research done into machines with an unlimited register
>file.
>What I have in mind is a stackish machine, with an intelligent
>stack cache that will delay writes around the stack pointer
>(since there's a very good chance that they will never have
>to be written at all).

Close, but not quite, the C Machine Stack Cache.  See SIGARCH/SIGPLAN
notices, vol. 17, no. 4, April 1982.