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From: kary@hplsdla.UUCP
Newsgroups: comp.arch
Subject: Re: Optimizing compiler's view on: no. of regs, aliasing, caller/callee save etc.
Message-ID: <3010002@hplsdla.HP.COM>
Date: Sun, 8-Mar-87 16:46:13 EST
Article-I.D.: hplsdla.3010002
Posted: Sun Mar  8 16:46:13 1987
Date-Received: Wed, 11-Mar-87 21:43:48 EST
References: <4277@utcsri.UUCP>
Organization: Hewlett-Packard, Colorado Springs
Lines: 20

> The problem is, you wouldn't gain much. As you go deeper into the stack,
> bits in the 'reg-in-use' word would become set, but would never be
> cleared by anything but a function return. 
The 'reg-in-use' word could be cleared at function entry.  Since the contents
of the registers are on the stack, they can be considered no longer in use.
Another thing that could be done is the 'reg-in-use' word could set the 
appropriate bit whenever a register is loaded, (the 'reg-in-use' word should
be a processor register, though not necessarily addressable) then there would 
be no compiler support required for the register mask feature.  The register 
mask would then reflect only the registers actually in use at the point of the 
function call, registers that are first used *after* the call wouldn't have 
to be saved.  One thing missing from this scheme is a way to clear a bit when
a register is no longer in use.  Perhaps clearing that bit could be tacked onto
every register instruction.  Every register instruction now has two modes, one
standard mode and one to clear the 'reg-in-use' bit.  The compiler could then
generate the second version the last time a register is used in a function.
This machine is now a MISC (Machiavellian Instruction Set Computer :-)

Dan Kary
hp-lsd!kary