Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site utcsri.UUCP Path: utzoo!utcsri!greg From: greg@utcsri.UUCP (Gregory Smith) Newsgroups: comp.arch Subject: Re: 64 Vs 32 Message-ID: <4366@utcsri.UUCP> Date: Sun, 15-Mar-87 12:58:18 EST Article-I.D.: utcsri.4366 Posted: Sun Mar 15 12:58:18 1987 Date-Received: Sun, 15-Mar-87 15:35:25 EST References: <3810013@nucsrl.UUCP> <985@rpics.RPI.EDU> <755@ames.UUCP> Reply-To: greg@utcsri.UUCP (Gregory Smith) Organization: CSRI, University of Toronto Lines: 48 Summary: In article <755@ames.UUCP> fouts@orville.UUCP (Marty Fouts) writes: >In article <985@rpics.RPI.EDU> yerazuws@rpics.RPI.EDU (Crah) writes: > >>Yep. Consider- it's now a standard configuration for VAX 8800's >>to come with 512 megs of memory (I've got the part number around >>somewhere). A VAX has 32 bits- so if we assume (*) that all 32 >>can be used as memory address, a VAX (or other 32-bit processor) >>can have AT MOST 4 GIG of memory. >> >c >Although this is true, historically when the limit is first reached, >processors aren't redesigned to use larger address spaces, but rather >work arounds are found. When 16 bits wasn't enough address space for >micros, "bank selection" was utilized. There are machines around[...] Even if you have 128 GIG of physical memory, it is still reasonable to restrict user processes to 4 GIG of virtual memory. Some PDP-11's have a 22-bit physical address space and all have a 16-bit virtual address space ( is the 22-bit figure right? ). A vax running a process in PDP-11 mode gives it only a 64K byte virtual address space. The point of all this being that you can still get by with 32-bit user registers and data width - you just have to widen the MMU. Another question: If you get to the point where you are using more than 2 GIG of virtual space on your 32-bit machine, and thus have 'negative' addresses, how many compiler (and other) bugs are suddenly going to show up? You had to be careful with comparisons on the PDP-11, and I've seen some sloppy code for 32-bit machines which assumes that pointers are always 'positive'. >Besides, with 4Mb memory chips, 4Gb is still (not counting ECC) 8 >THOUSAND chips; so we aren't likely to see very many machines with >that many memory parts, soon. I have used an 11/34 with 256K, made of 2Kx1 static rams. That's 1024 chips, (which probably used much more power per chip than a 1M chip) and they were all on a single hex UNIBUS card, and not very densely, either. A double-sided board. >I still hold out for ten years, if at all. Maybe 10 years for the 64-bit data path on a chip, but not for >32 bits address in an external MMU chip. -- ---------------------------------------------------------------------- Greg Smith University of Toronto UUCP: ..utzoo!utcsri!greg Have vAX, will hack...