Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!lll-lcc!pyramid!prls!mips!hansen From: hansen@mips.UUCP (Craig Hansen) Newsgroups: comp.arch Subject: Re: 64 Vs 32 Message-ID: <205@dumbo.mips.UUCP> Date: Sun, 15-Mar-87 19:28:55 EST Article-I.D.: dumbo.205 Posted: Sun Mar 15 19:28:55 1987 Date-Received: Mon, 16-Mar-87 05:06:33 EST References: <3810013@nucsrl.UUCP> <1308@ucbcad.berkeley.edu> Lines: 38 Summary: what 64-bit Precision addresses are In article <1308@ucbcad.berkeley.edu>, faustus@ucbcad.berkeley.edu (Wayne A. Christopher) writes: > I just read somewhere that the new HP Precision Architecture supports "up > to 64-bit virtual addresses". It seems to have a 32-bit internal datapath, > however. Can anybody explain what the 64-bit addresses are? The 64-bit addresses are segmented addresses, with a 30-32 bit offset, and an (address) space identifier of up to 32 bits. Space identifiers are held in separate registers from the general registers, and are referenced either explicitly by the instruction or implicitly by the high-order bits of the offset. The purist would complain that this isn't at all the same as having a 64-bit linear virtual address, and he'd be right - it isn't. However, as you can see from the datapath width (32 bits), Precision isn't a 64-bit machine, and it wasn't really expected that a single process would need more than a 32-bit address space. Remembering that what we're talking about is virtual addresses, the size of the virtual address space really reflects the fact that Precision was designed for virtual-addressed caches, and you'd like to avoid flushing the caches on context switches. The first machine that HP has released has 16-bit space identifiers, which reflects the number of simultaneous processes that are expected to run on the machine. I'd be interested in hearing opinions on the necessary sizes of both virtual and physical address spaces for machines over the next five to ten years, both per-process and per-system. (Without trying to color the responses, my personal view is that per-system physical addresses will have to grow beyond 32 bits on high-end machines within five years, and that virtual addresses (per-process) will have to go beyond 32 bits in the same time frame.) Looks like memory is becoming cheap and memory addressing is becoming dear... -- Craig Hansen | "Evahthun' tastes MIPS Computer Systems | bettah when it ...decwrl!mips!hansen | sits on a RISC"