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From: faustus@ucbcad.UUCP
Newsgroups: comp.lang.c
Subject: Re: Comments on ANSI public Oct 86 Public review draft.
Message-ID: <1300@ucbcad.berkeley.edu>
Date: Mon, 9-Mar-87 15:40:52 EST
Article-I.D.: ucbcad.1300
Posted: Mon Mar  9 15:40:52 1987
Date-Received: Tue, 10-Mar-87 05:33:45 EST
References: <4804@brl-adm.ARPA>
Organization: CAD Group, U.C. Berkeley
Lines: 26

In article <4804@brl-adm.ARPA>, Schauble@mit-multics.arpa (Paul Schauble) writes:
> Honeywell uses a slightly unusual register structure that give a float
> or double contained in a register an extra 8 bits precision. This is
> lost when the value is stored into memory....
> 
>        FLD     X          Get X into register
>        FMP     Y          Multiply by Y, giving result in register.
>                           Result is *double precision plus extra 8 bits*. 
>                           That's right, single*single yields double.
>        FST     Z          Store results, truncating to single precision
>                           without extra bits.
>        FCMP    Z          First of IF statement. Compares truncated value
>                           In memory to extra precision value in register.
>                           Result is probably not equal.

I think the problem isn't with the arithmetic operations being
performed, but with the test for equality.  I think the hardware should
be intelligent enough to say that a single in memory is equal to a
double+ in a register, if the MSB's of the register are the same as the
bits of the single.  (Assuming that the FST just truncates.) Otherwise
equality in floating point has no useful meaning.  Are problems like
this common enough that it would be better to just say that it's
undefined, as opposed to complaining to the makers of this sort of
hardware?

	Wayne