Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!rutgers!cbmvax!grr From: grr@cbmvax.UUCP Newsgroups: comp.sys.amiga Subject: Re: 2 meg chip ram Message-ID: <1423@cbmvax.cbmvax.cbm.UUCP> Date: Tue, 17-Feb-87 05:30:05 EST Article-I.D.: cbmvax.1423 Posted: Tue Feb 17 05:30:05 1987 Date-Received: Wed, 18-Feb-87 04:01:15 EST References: <2438@jade.BERKELEY.EDU> <1375@cbmvax.cbmvax.cbm.UUCP> <7@ethz.UUCP> Reply-To: grr@cbmvax.UUCP (George Robbins) Organization: Commodore Technology, West Chester, PA Lines: 22 In article <7@ethz.UUCP> claudio@ethz.UUCP (Claudio Nieder) writes: > >According to the AGNUS PIN ASSIGNMENT printed on page C-2 of the Amiga >Hardware Reference Manual Agnus has two VSS pins (27,41). Is there >really no way to use one of these to add an additional address line ? > claudio You ever try to take a ground pin away from a chip guy? Seriously, lead-frame impedance to ground is a serious problem with LSI chips. The more bus lines you push around, the greater the ground noise seen at the die. This can lead to glitches on the both the signals generated by the chip, and the chips's perception of external signals. As a result, you see packages with multiple ground and power pins and also a tendency to shift the power and ground pins towards the center of long, skinny packages. How many pins you allow is often rule-of-thumb or how many are available, although design rules for gate arrays do give more specific guidelines - lots of pins! -- George Robbins - now working for, uucp: {ihnp4|seismo|rutgers}!cbmvax!grr but no way officially representing arpa: cbmvax!grr@seismo.css.GOV Commodore, Engineering Department fone: 215-431-9255 (only by moonlite)